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How can small FPgas make a big difference

Mar 14 2025 2025-03 Semiconductors Lattice Semiconductor Corporation
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As with many types of devices, it's easy to fall into the trap of thinking that big chips are better and more impactful than small ones. However, when it comes to FPgas (field-programmable gate arrays), smaller chips tend to have the greatest application range and impact.

     As with many types of devices, it's easy to fall into the trap of thinking that big chips are better and more impactful than small ones. However, when it comes to FPgas (field-programmable gate arrays), smaller chips tend to have the greatest application range and impact.

     Small FPgas are used in a wide variety of devices, applications, and industries because of their ability to reliably perform critical functions that are critical to the fast operation of many different types of intelligent systems. At the same time, due to their programmable nature, they can be easily customized to the specific requirements of different types of devices.

     Lattice Semiconductor has been developing the unique capabilities of small FPGas for years and has built a business around those capabilities,  with annual revenue of approximately $500 million. Recently, the company introduced a second generation version of its small FPGA architecture. The new Lattice Nexus™ 2 platform uses the 16nm TSMC FinFET process, which offers several important benefits from smaller process nodes. In particular, Nexus 2-based chips are able to operate at optimal power and higher speeds, while being physically smaller, compared to competing products from other vendors.

     Lattice has also integrated more and faster connectivity solutions and enhanced security standards support into the Nexus 2 platform. In terms of connectivity, the Nexus 2 supports multi-protocol 16G SERDES, MIPI D, and C-PHY speeds of up to 7.98 Gbps by integrating a PCIe Gen 4 controller. The platform also supports the use of high-speed LPDDR4 storage for faster overall system performance.

     In terms of security, the Nexus 2 supports 256-bit AES-GCM and SHA3-512 standards, and complies with FIPS 140-3 Level 2 standards, which means that devices with this chip have stronger security in sensitive and mission-critical environments. In addition, because such FPgas are typically used for longer-lived devices, the Nexus 2 platform is well positioned for the post-quantum era, taking a lot of pressure off system designers who know that these devices can even handle potential future security challenges.

     The first device for the Nexus 2 platform is the Lattice Certus™-N2 series universal FPGA, and many Lattice customers have already received samples. In addition, Lattice has upgraded the Lattice Propel and Lattice Radiant design software tools to support these new chips, allowing system designers to customize them to their specific needs.

     With these new capabilities, the Certus-N2 chip will be able to deliver higher performance in existing applications, opening up a range of opportunities for new applications. For example, in practical applications, power consumption is reduced by three times compared to similar products, which means that the new device consumes less power, operates more reliably, and lasts longer in a battery-powered environment.

     The performance improvements of the new platform can be seen in several ways. First, faster bandwidth connections between SERDES, DRAM, flash, and PCI allow systems to work more efficiently and connect with higher data rate peripherals. This is also a key reason why the Nexus 2 FPGA boots up much faster (up to 20x) than some of its competitors.

     Because FPgas often act as a middleman between sensors and computing, and provide a connection point in large systems, these new capabilities create opportunities for new applications. For example, in a modern automotive design with a partition architecture, these partitions need to be connected to each other quickly and reliably. In addition, the Certus-N2 can wake up almost instantaneously while the car is driving, which can play a huge role in responding to external trigger data. Similar applications may also emerge in environments where high-speed motors are used to control robots, such as in manufacturing.

     Other key architectural benefits of the Nexus 2 include twice as many customizable logic units as the first Nexus device and more than three times as many DSP cores, up to 520. Together, these capabilities can run more advanced algorithms that improve the accuracy and speed of edge inference applications such as person or object presence detection, image or audio recognition, and more.

     While these applications may not receive as much attention as today's newest Gpus, the critical nature of small FPGas processing tasks makes them an absolutely indispensable part of many of today's devices. Controlling the startup process, connecting sensors to the computing center, dedicated algorithms that are sensitive to run time, and much more that can be achieved with small FPgas are at the heart of advanced system operation

     As today's advanced devices continue to use a variety of advanced functions, the requirements for chips that support these basic operations continue to increase. Therefore, improving the performance of the Nexus family of small FPGas is an important and far-reaching step in powering the next generation of advanced systems.

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