Cypress introduces high-performance synchronous SRAM with on-chip error correction codes

     Cypress Semiconductor Corporation announced the industry's highest capacity synchronous SRAM with on-chip error correction code (ECC). The new 36Mb synchronous SRAM integrates ECC capabilities to provide the highest level of data reliability and simplify the design of a variety of military, communications and data processing applications. Cypress plans to expand its synchronous SRAM line with ECC capabilities this year and add other capacity products.

     Soft errors caused by background radiation can corrupt the contents of memory, resulting in the loss of important data. The hardware ECC modules in Cypress's new synchronous SRAM family perform all error correction functions online without user intervention, achieving the industry's best soft error rate (SER) performance. These ECC enabled synchronous SRAM devices are compatible with existing synchronous SRAM pins, allowing customers to improve SER and system reliability without changing the board design. In addition, the new SRAM also reduces power consumption by up to 36% compared to competing solutions.

     Oliver Pohland, Head of the Synchronous SRAM Business Unit at Cypress, said: "Cypress is the world leader in synchronous SRAM. This new family of devices with on-chip ECC capabilities fulfills our commitment to expand our standard synchronous, NoBL and QDR SRAM offerings. As with our entire SRAM product line, these new devices are derived from Cypress's industry-best manufacturing capabilities and enjoy the best customer support."